Principal Digital Design Engineer [Department Code 1001]

Description:

This position will be responsible for design and development of RTL code for use in ASIC designs of MEMS based sensor SOC for variety of cutting edge applications such as gaming, handsets, and navigation. Designing these devices requires understanding and interest in working at the full chip level, utilizing knowledge in the area of RTL design for low power and multiple clock and power domains.

Deliverables will include requirements documentation, architecture evaluation and design, RTL code, designing and verifying digital blocks that are implemented in standard cell ASIC and/or FPGA. You will work closely with verification, analog/ mixed signal, firmware, and physical design engineers to support full chip implementation with emphasis on the SOC logic architecture and design.

The successful candidate will have extensive experience in architecture/micro-architecture design, digital design through RTL coding in Verilog, synthesis and simulation, pre- and post-silicon verification methodologies with industry standard tools. A background in processor architecture, arbitration logic, I2C, SPI, DMA, interrupt architecture, low power architecture, clock domain crossing, simple DSP architecture and modeling is required. Good communication, organization, problem solving, and ability to work seamlessly with others in a fast paced environment is highly desired.

Requirements:

• ASIC design focus. Must have experience in Verilog RTL coding, low power design methodology, clock domain crossings, memory/fifo and simple processor design, and FPGA design and bring-up (Xilinx ISE),.
• Experience with all stages in the ASIC design flow including floorplanning, synthesis, static timing analysis, equivalence checking, SCAN insertion, ATPG, DFT, ECO, bringup/lab debug, and ATE test development
• Participate in product definition, early customer support. Work with architect, marketing, and applications engineering to ensure finished product meets technical specifications and customers’ needs.
• Work with project manager to ensure product is delivered on schedule
• Staff : Minimum 7 years experience, Principal: Minimum 10 years experience
• BS/MS in EE or equivalent field

Desired Skills:

• Experience in coding test benches, bfm development, and design verification
• Experience with I2C and SPI
• Experience debugging with lab equipment such as logic analyzers, oscilloscopes,signal generators, etc.
• Experience with scripting languages such as perl, tcl, etc

To apply or learn more about this position, contact human resources. Please add the Job title and department code into the subject line for your e-mail.